Kirchhoff's Current Law (KCL)
Kirchhoff's current law: the sum of currents entering a node equals the sum leaving.
Essential for circuit analysis and node equations.
The Formula
Kirchhoff's current law states that the total current flowing into any junction (node) in a circuit equals the total current flowing out.
This is based on the conservation of electric charge — charge cannot build up at a node.
Equivalently: the algebraic sum of all currents at a node is zero.
Variables
| Symbol | Meaning |
|---|---|
| ΣI_in | Sum of all currents entering the node (Amperes, A) |
| ΣI_out | Sum of all currents leaving the node (Amperes, A) |
Example 1
Three wires meet at a junction. Wire A carries 5 A into the junction, wire B carries 3 A into the junction. What current flows through wire C?
ΣI_in = ΣI_out
I_A + I_B = I_C
5 A + 3 A = I_C
I_C = 8 A (flowing out of the junction)
Example 2
At a circuit node, 10 A flows in from the source. Three branches leave: I₁ = 4 A, I₂ = 3.5 A. Find I₃.
ΣI_in = ΣI_out
10 = I₁ + I₂ + I₃
10 = 4 + 3.5 + I₃
I₃ = 10 - 7.5
I₃ = 2.5 A
When to Use It
Use Kirchhoff's current law when you need to:
- Find unknown currents at junctions in complex circuits
- Verify that your circuit analysis is correct
- Set up node equations for systematic circuit solving
- Analyse parallel branches where current divides
KCL works for both DC and AC circuits.
In AC circuits, currents are represented as phasors (complex numbers) to account for phase differences.
Key Notes
- KCL: ΣI_in = ΣI_out at every node: The sum of all currents entering a junction equals the sum leaving it. Equivalently: the algebraic sum of all currents at a node is zero (assign signs based on direction convention). This is a consequence of conservation of electric charge.
- KVL (Kirchhoff's Voltage Law) — the partner law: The sum of all voltage drops around any closed loop equals zero. KCL and KVL together allow solving any resistive circuit. KCL gives node equations; KVL gives loop equations.
- Node-voltage method: Assign a voltage variable to each non-reference node. Write one KCL equation per node (I = V/R for each branch). Solve the resulting system of linear equations. This is the standard technique for circuit simulation software.
- Works for any circuit topology: KCL applies to nodes in any network — series, parallel, bridge circuits, op-amp circuits, transistor bias networks, and complex multi-loop systems. It also applies to AC circuits using phasor currents (complex numbers).
- Applications: KCL is used in all circuit analysis: PCB design verification, op-amp input current analysis, power distribution network modeling, SPICE simulation fundamentals, and fault analysis in electrical power systems.